Data processing devices such as central processing units (CPUs), when accessing a nonvolatile memory device, transmit a command and then transmit address information over a predetermined number of cycles. In these years, as the capacity of the nonvolatile memory device is increasing, address information is increasing in size.
Nonvolatile memory devices (Multi-Dies) including multiple semiconductor chips are known. When accessing the nonvolatile memory device including multiple semiconductor chips, a CPU transmits address information including information to select a chip (a chip address). The chip address is, for example, three bits of information and can identify eight chips. When the chip address included in the address information coincides with its own identification value, each semiconductor chip performs data write or read or so on. On the other hand, when the chip address included in the address information does not coincide with its own identification value, each semiconductor chip does not perform data write nor read nor so on.
The nonvolatile memory device can be configured to include only one semiconductor chip. In this case, when receiving address information, the semiconductor chip performs data write or read or so on every time without referring to the chip address.
However, the CPU transmits address information including a chip address regardless of whether the nonvolatile memory device is configured to include only one semiconductor chip or multiple ones. Thus, in a system using the nonvolatile memory device configured to include only one semiconductor chip, the CPU has to transmit address information including a chip address, although the chip address is not used. Further, the semiconductor chip may have to perform an extra acquisition process for the unused chip address.